STM32 » Histórico » Versão 6
Gabriel Lima, 23/03/2020 16:29 h
| 1 | 1 | Gabriel Lima | h1. STM32 |
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| 3 | O modelo de STM32 quee foi utilizado nos desenvolvimentos foi o STM32F407VGT6, mais especificamente, a placa de desenvolvimento STM32F4 DISCOVERY, a mesma utilizada nos robôs de 2019 da SSL e nas placas de comunicação de 2019 da SSL e da VSS. |
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| 5 | 3 | Gabriel Lima | h2. Links úteis |
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| 7 | Download da STM32CubeIDE https://www.st.com/en/development-tools/stm32cubeide.html |
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| 8 | Curso iniciante da ST sobre a IDE https://www.youtube.com/playlist?list=PLnMKNibPkDnFCosVVv98U5dCulE6T3Iy8 |
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| 9 | Outros cursos da ST https://www.youtube.com/user/STonlineMedia/playlists?view=50&sort=dd&shelf_id=33 |
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| 10 | 6 | Gabriel Lima | Attachments desta página |
| 11 | 3 | Gabriel Lima | |
| 12 | 1 | Gabriel Lima | h2. Features |
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| 14 | • Core: ARM® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions |
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| 15 | • Memories |
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| 16 | – Up to 1 Mbyte of Flash memory |
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| 17 | – Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM |
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| 18 | – Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories |
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| 19 | • LCD parallel interface, 8080/6800 modes |
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| 20 | • Clock, reset and supply management |
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| 21 | – 1.8 V to 3.6 V application supply and I/Os |
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| 22 | – POR, PDR, PVD and BOR |
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| 23 | – 4-to-26 MHz crystal oscillator |
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| 24 | – Internal 16 MHz factory-trimmed RC (1% accuracy) |
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| 25 | – 32 kHz oscillator for RTC with calibration |
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| 26 | – Internal 32 kHz RC with calibration |
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| 27 | • Low-power operation |
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| 28 | – Sleep, Stop and Standby modes |
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| 29 | – VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM |
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| 30 | • 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode |
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| 31 | • 2×12-bit D/A converters |
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| 32 | • General-purpose DMA: 16-stream DMA controller with FIFOs and burst support |
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| 33 | • Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input |
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| 34 | • Debug mode |
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| 35 | – Serial wire debug (SWD) & JTAG interfaces |
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| 36 | – Cortex-M4 Embedded Trace Macrocell™ |
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| 37 | • Up to 140 I/O ports with interrupt capability |
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| 38 | – Up to 136 fast I/Os up to 84 MHz |
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| 39 | – Up to 138 5 V-tolerant I/Os |
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| 40 | • Up to 15 communication interfaces |
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| 41 | – Up to 3 × I2C interfaces (SMBus/PMBus) |
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| 42 | – Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) |
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| 43 | – Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock |
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| 44 | – 2 × CAN interfaces (2.0B Active) |
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| 45 | – SDIO interface |
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| 46 | • Advanced connectivity |
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| 47 | – USB 2.0 full-speed device/host/OTG controller with on-chip PHY |
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| 48 | – USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI |
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| 49 | – 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII |
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| 50 | 2 | Gabriel Lima | |
| 51 | h2. Circuit Diagram |
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| 53 | !STM32F407_Diagram.jpg! |
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| 55 | h2. Pinout |
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| 57 | !STM32F4DISCOVERY_Pinout.png! |